An electrostatic discharge (ESD) event involves a high voltage or a large current inadvertently surging through a conductive path. If the path includes a pin or an external bonding pad and an internal circuit of an integrated circuit (IC), then the large current of the ESD event can surge through the pad and damage the internal circuit and thus the entire IC.
To protect the IC from damage caused by an ESD event, many ESD protection devices have been designed. Among them is a snapback-based ESD protection device. Conventionally, there are two types of snapback-based ESD protection devices. These two types include field-oxide NPN and thin-oxide NPN devices. Thin-oxide NPN devices are also known as NMOS devices. Although the performance of these devices is acceptable, each of them has its problems and limitations.
In general, problems associated with snapback-based NPN structures involves junction leakage failures following an ESD event. In addition, gate-oxide at the input-buffer can be damaged if the snapback voltage of the protection device is too high. The high snapback voltage can also cause damage to the gate-oxide in the protection device itself for a thin-oxide NPN device. These issues can lead to undesirable or substandard performance of the ESD protection device.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for an improved ESD protection device which is less susceptible to failures seen in the present NPN snapback ESD protection devices.